Sysctl_api

Macros
#define	SYSCTL_PPBASE   0x400fe300
#define	SYSCTL_SRBASE   0x400fe500
#define	SYSCTL_RCGCBASE   0x400fe600
#define	SYSCTL_SCGCBASE   0x400fe700
#define	SYSCTL_DCGCBASE   0x400fe800
#define	SYSCTL_PCBASE   0x400fe900
#define	SYSCTL_PRBASE   0x400fea00

Functions
uint32_t	SysCtlSRAMSizeGet (void)
uint32_t	SysCtlFlashSizeGet (void)
bool	SysCtlPeripheralPresent (uint32_t ui32Peripheral)
bool	SysCtlPeripheralReady (uint32_t ui32Peripheral)
void	SysCtlPeripheralPowerOn (uint32_t ui32Peripheral)
void	SysCtlPeripheralPowerOff (uint32_t ui32Peripheral)
void	SysCtlPeripheralReset (uint32_t ui32Peripheral)
void	SysCtlPeripheralEnable (uint32_t ui32Peripheral)
void	SysCtlPeripheralDisable (uint32_t ui32Peripheral)
void	SysCtlPeripheralSleepEnable (uint32_t ui32Peripheral)
void	SysCtlPeripheralSleepDisable (uint32_t ui32Peripheral)
void	SysCtlPeripheralDeepSleepEnable (uint32_t ui32Peripheral)
void	SysCtlPeripheralDeepSleepDisable (uint32_t ui32Peripheral)
void	SysCtlPeripheralClockGating (bool bEnable)
void	SysCtlIntRegister (void(*pfnHandler)(void))
void	SysCtlIntUnregister (void)
void	SysCtlIntEnable (uint32_t ui32Ints)
void	SysCtlIntDisable (uint32_t ui32Ints)
void	SysCtlIntClear (uint32_t ui32Ints)
uint32_t	SysCtlIntStatus (bool bMasked)
void	SysCtlReset (void)
void	SysCtlSleep (void)
void	SysCtlDeepSleep (void)
uint32_t	SysCtlResetCauseGet (void)
void	SysCtlResetCauseClear (uint32_t ui32Causes)
void	SysCtlMOSCConfigSet (uint32_t ui32Config)
uint32_t	SysCtlPIOSCCalibrate (uint32_t ui32Type)
void	SysCtlClockSet (uint32_t ui32Config)
uint32_t	SysCtlClockGet (void)
void	SysCtlDeepSleepClockSet (uint32_t ui32Config)
void	SysCtlPWMClockSet (uint32_t ui32Config)
uint32_t	SysCtlPWMClockGet (void)
void	SysCtlADCSpeedSet (uint32_t ui32Speed)
uint32_t	SysCtlADCSpeedGet (void)
void	SysCtlGPIOAHBEnable (uint32_t ui32GPIOPeripheral)
void	SysCtlGPIOAHBDisable (uint32_t ui32GPIOPeripheral)
void	SysCtlUSBPLLEnable (void)
void	SysCtlUSBPLLDisable (void)

Variables
uint32_t	ui32SysDiv
uint32_t	ui32Osc
uint32_t	ui32OscSelect
uint32_t	ui32RSClkConfig
bool	bNewPLL

Detailed Description

Function Documentation

uint32_t SysCtlADCSpeedGet

(

void

)

Gets the sample rate of the ADC.

This function gets the current sample rate of the ADC.

Returns

Returns the current ADC sample rate; is one of SYSCTL_ADCSPEED_1MSPS, SYSCTL_ADCSPEED_500KSPS, SYSCTL_ADCSPEED_250KSPS, or SYSCTL_ADCSPEED_125KSPS.

void SysCtlADCSpeedSet

(

uint32_t

ui32Speed

)

Sets the sample rate of the ADC.

Parameters

ui32Speed

is the desired sample rate of the ADC; must be one of SYSCTL_ADCSPEED_1MSPS, SYSCTL_ADCSPEED_500KSPS, SYSCTL_ADCSPEED_250KSPS, or SYSCTL_ADCSPEED_125KSPS.

This function configures the rate at which the ADC samples are captured by the ADC block. The sampling speed may be limited by the hardware, so the sample rate may end up being slower than requested. SysCtlADCSpeedGet() returns the actual speed in use.

Returns

None.

uint32_t SysCtlClockGet

(

void

)

Gets the processor clock rate.

This function determines the clock rate of the processor clock, which is also the clock rate of the peripheral modules (with the exception of PWM, which has its own clock divider; other peripherals may have different clocking, see the device data sheet for details).

Note

This cannot return accurate results if SysCtlClockSet() has not been called to configure the clocking of the device, or if the device is directly clocked from a crystal (or a clock source) that is not one of the supported crystal frequencies. In the latter case, this function should be modified to directly return the correct system clock rate.

Returns

The processor clock rate.

void SysCtlClockSet

(

uint32_t

ui32Config

)

Sets the clocking of the device.

Parameters

ui32Config

is the required configuration of the device clocking.

This function configures the clocking of the device. The input crystal frequency, oscillator to be used, use of the PLL, and the system clock divider are all configured with this function.

The ui32Config parameter is the logical OR of several different values, many of which are grouped into sets where only one can be chosen.

The system clock divider is chosen with one of the following values: SYSCTL_SYSDIV_1, SYSCTL_SYSDIV_2, SYSCTL_SYSDIV_3, ... SYSCTL_SYSDIV_64.

The use of the PLL is chosen with either SYSCTL_USE_PLL or SYSCTL_USE_OSC.

The external crystal frequency is chosen with one of the following values: SYSCTL_XTAL_4MHZ, SYSCTL_XTAL_4_09MHZ, SYSCTL_XTAL_4_91MHZ, SYSCTL_XTAL_5MHZ, SYSCTL_XTAL_5_12MHZ, SYSCTL_XTAL_6MHZ, SYSCTL_XTAL_6_14MHZ, SYSCTL_XTAL_7_37MHZ, SYSCTL_XTAL_8MHZ, SYSCTL_XTAL_8_19MHZ, SYSCTL_XTAL_10MHZ, SYSCTL_XTAL_12MHZ, SYSCTL_XTAL_12_2MHZ, SYSCTL_XTAL_13_5MHZ, SYSCTL_XTAL_14_3MHZ, SYSCTL_XTAL_16MHZ, SYSCTL_XTAL_16_3MHZ, SYSCTL_XTAL_18MHZ, SYSCTL_XTAL_20MHZ, SYSCTL_XTAL_24MHZ, or SYSCTL_XTAL_25MHz. Values below SYSCTL_XTAL_5MHZ are not valid when the PLL is in operation.

The oscillator source is chosen with one of the following values: SYSCTL_OSC_MAIN, SYSCTL_OSC_INT, SYSCTL_OSC_INT4, SYSCTL_OSC_INT30, or SYSCTL_OSC_EXT32. SYSCTL_OSC_EXT32 is only available on devices with the hibernate module, and then only when the hibernate module has been enabled.

The internal and main oscillators are disabled with the SYSCTL_INT_OSC_DIS and SYSCTL_MAIN_OSC_DIS flags, respectively. The external oscillator must be enabled in order to use an external clock source. Note that attempts to disable the oscillator used to clock the device is prevented by the hardware.

To clock the system from an external source (such as an external crystal oscillator), use SYSCTL_USE_OSC | SYSCTL_OSC_MAIN. To clock the system from the main oscillator, use SYSCTL_USE_OSC | SYSCTL_OSC_MAIN. To clock the system from the PLL, use SYSCTL_USE_PLL | SYSCTL_OSC_MAIN, and select the appropriate crystal with one of the SYSCTL_XTAL_xxx values.

Note

If selecting the PLL as the system clock source (that is, via SYSCTL_USE_PLL), this function polls the PLL lock interrupt to determine when the PLL has locked. If an interrupt handler for the system control interrupt is in place, and it responds to and clears the PLL lock interrupt, this function delays until its timeout has occurred instead of completing as soon as PLL lock is achieved.

Returns

None.

void SysCtlDeepSleep

(

void

)

Puts the processor into deep-sleep mode.

This function places the processor into deep-sleep mode; it does not return until the processor returns to run mode. The peripherals that are enabled via SysCtlPeripheralDeepSleepEnable() continue to operate and can wake up the processor (if automatic clock gating is enabled with SysCtlPeripheralClockGating(), otherwise all peripherals continue to operate).

Returns

None.

void SysCtlDeepSleepClockSet

(

uint32_t

ui32Config

)

Sets the clocking of the device while in deep-sleep mode.

Parameters

ui32Config

is the required configuration of the device clocking while in deep-sleep mode.

This function configures the clocking of the device while in deep-sleep mode. The oscillator to be used and the system clock divider are configured with this function.

The ui32Config parameter is the logical OR of the following values:

The system clock divider is chosen from one of the following values: SYSCTL_DSLP_DIV_1, SYSCTL_DSLP_DIV_2, SYSCTL_DSLP_DIV_3, ... SYSCTL_DSLP_DIV_64.

The oscillator source is chosen from one of the following values: SYSCTL_DSLP_OSC_MAIN, SYSCTL_DSLP_OSC_INT, SYSCTL_DSLP_OSC_INT30, or SYSCTL_DSLP_OSC_EXT32. SYSCTL_OSC_EXT32 is only available on devices with the hibernation module, and then only when the hibernation module has been enabled.

The precision internal oscillator can be powered down in deep-sleep mode by specifying SYSCTL_DSLP_PIOSC_PD. The precision internal oscillator is not powered down if it is required for operation while in deep-sleep (based on other configuration settings.)

Note

The availability of deep-sleep clocking configuration varies with the Tiva part in use. Please consult the data sheet for the part you are using to determine whether this support is available.

Returns

None.

uint32_t SysCtlFlashSizeGet

(

void

)

Gets the size of the flash.

This function determines the size of the flash on the Tiva device.

Returns

The total number of bytes of flash.

void SysCtlGPIOAHBDisable

(

uint32_t

ui32GPIOPeripheral

)

Disables access to a GPIO peripheral via the AHB.

Parameters

ui32GPIOPeripheral

is the GPIO peripheral to disable.

This function disables the specified GPIO peripheral for access from the Advanced Host Bus (AHB). Once disabled, the GPIO peripheral is accessed from the legacy Advanced Peripheral Bus (APB).

The ui32GPIOPeripheral argument must be only one of the following values: SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, or SYSCTL_PERIPH_GPIOJ.

Note

Some devices allow disabling AHB access to GPIO ports that are only present on the AHB. Disabling AHB access to these ports will disable access to these GPIO ports.

Returns

None.

void SysCtlGPIOAHBEnable

(

uint32_t

ui32GPIOPeripheral

)

Enables access to a GPIO peripheral via the AHB.

Parameters

ui32GPIOPeripheral

is the GPIO peripheral to enable.

This function is used to enable the specified GPIO peripheral to be accessed from the Advanced Host Bus (AHB) instead of the legacy Advanced Peripheral Bus (APB). When a GPIO peripheral is enabled for AHB access, the _AHB_BASE form of the base address should be used for GPIO functions. For example, instead of using GPIO_PORTA_BASE as the base address for GPIO functions, use GPIO_PORTA_AHB_BASE instead.

The ui32GPIOPeripheral argument must be only one of the following values: SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, or SYSCTL_PERIPH_GPIOJ.

Returns

None.

void SysCtlIntClear

(

uint32_t

ui32Ints

)

Clears system control interrupt sources.

Parameters

ui32Ints

is a bit mask of the interrupt sources to be cleared. Must be a logical OR of SYSCTL_INT_PLL_LOCK, SYSCTL_INT_CUR_LIMIT, SYSCTL_INT_IOSC_FAIL, SYSCTL_INT_MOSC_FAIL, SYSCTL_INT_POR, SYSCTL_INT_BOR, and/or SYSCTL_INT_PLL_FAIL.

The specified system control interrupt sources are cleared, so that they no longer assert. This function must be called in the interrupt handler to keep it from being called again immediately upon exit.

Note

Because there is a write buffer in the Cortex-M processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (because the interrupt controller still sees the interrupt source asserted).

The interrupt sources vary based on the Tiva part in use. Please consult the data sheet for the part you are using to determine which interrupt sources are available.

Returns

None.

void SysCtlIntDisable

(

uint32_t

ui32Ints

)

Disables individual system control interrupt sources.

Parameters

ui32Ints

is a bit mask of the interrupt sources to be disabled. Must be a logical OR of SYSCTL_INT_PLL_LOCK, SYSCTL_INT_CUR_LIMIT, SYSCTL_INT_IOSC_FAIL, SYSCTL_INT_MOSC_FAIL, SYSCTL_INT_POR, SYSCTL_INT_BOR, and/or SYSCTL_INT_PLL_FAIL.

This function disables the indicated system control interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Note

The interrupt sources vary based on the Tiva part in use. Please consult the data sheet for the part you are using to determine which interrupt sources are available.

Returns

None.

void SysCtlIntEnable

(

uint32_t

ui32Ints

)

Enables individual system control interrupt sources.

Parameters

ui32Ints

is a bit mask of the interrupt sources to be enabled. Must be a logical OR of SYSCTL_INT_PLL_LOCK, SYSCTL_INT_CUR_LIMIT, SYSCTL_INT_IOSC_FAIL, SYSCTL_INT_MOSC_FAIL, SYSCTL_INT_POR, SYSCTL_INT_BOR, and/or SYSCTL_INT_PLL_FAIL.

This function enables the indicated system control interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Note

The interrupt sources vary based on the Tiva part in use. Please consult the data sheet for the part you are using to determine which interrupt sources are available.

Returns

None.

void SysCtlIntRegister

(

void(*)(void)

pfnHandler

)

Registers an interrupt handler for the system control interrupt.

Parameters

pfnHandler

is a pointer to the function to be called when the system control interrupt occurs.

This function registers the handler to be called when a system control interrupt occurs. This function enables the global interrupt in the interrupt controller; specific system control interrupts must be enabled via SysCtlIntEnable(). It is the interrupt handler's responsibility to clear the interrupt source via SysCtlIntClear().

System control can generate interrupts when the PLL achieves lock, if the internal LDO current limit is exceeded, if the internal oscillator fails, if the main oscillator fails, if the internal LDO output voltage droops too much, if the external voltage droops too much, or if the PLL fails.

See also

IntRegister() for important information about registering interrupt handlers.

Note

The events that cause system control interrupts vary based on the Tiva part in use. Please consult the data sheet for the part you are using to determine which interrupt sources are available.

Returns

None.

uint32_t SysCtlIntStatus

(

bool

bMasked

)

Gets the current interrupt status.

Parameters

bMasked

is false if the raw interrupt status is required and true if the masked interrupt status is required.

This function returns the interrupt status for the system controller. Either the raw interrupt status or the status of interrupts that are allowed to reflect to the processor can be returned.

Note

The interrupt sources vary based on the Tiva part in use. Please consult the data sheet for the part you are using to determine which interrupt sources are available.

Returns

The current interrupt status, enumerated as a bit field of SYSCTL_INT_PLL_LOCK, SYSCTL_INT_CUR_LIMIT, SYSCTL_INT_IOSC_FAIL, SYSCTL_INT_MOSC_FAIL, SYSCTL_INT_POR, SYSCTL_INT_BOR, and SYSCTL_INT_PLL_FAIL.

void SysCtlIntUnregister

(

void

)

Unregisters the interrupt handler for the system control interrupt.

This function unregisters the handler to be called when a system control interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

See also

IntRegister() for important information about registering interrupt handlers.

Returns

None.

void SysCtlMOSCConfigSet

(

uint32_t

ui32Config

)

Provides a small delay.

Parameters

ui32Count

is the number of delay loop iterations to perform.

This function provides a means of generating a constant length delay. It is written in assembly to keep the delay consistent across tool chains, avoiding the need to tune the delay based on the tool chain in use.

The loop takes 3 cycles/loop.

Returns

None. Sets the configuration of the main oscillator (MOSC) control.

Parameters

ui32Config

is the required configuration of the MOSC control.

This function configures the control of the main oscillator. The ui32Config is specified as the logical OR of the following values:

• SYSCTL_MOSC_VALIDATE enables the MOSC verification circuit that detects a failure of the main oscillator (such as a loss of the clock).
• SYSCTL_MOSC_INTERRUPT indicates that a MOSC failure should generate an interrupt instead of resetting the processor.
• SYSCTL_MOSC_NO_XTAL indicates that there is no crystal connected to the OSC0/OSC1 pins, allowing power consumption to be reduced.

Note

The availability of MOSC control varies based on the Tiva part in use. Please consult the data sheet for the part you are using to determine whether this support is available. In addition, the capability of MOSC control varies based on the Tiva part in use.

Returns

None.

void SysCtlPeripheralClockGating

(

bool

bEnable

)

Controls peripheral clock gating in sleep and deep-sleep mode.

Parameters

bEnable

is a boolean that is true if the sleep and deep-sleep peripheral configuration should be used and false if not.

This function controls how peripherals are clocked when the processor goes into sleep or deep-sleep mode. By default, the peripherals are clocked the same as in run mode; if peripheral clock gating is enabled, they are clocked according to the configuration set by SysCtlPeripheralSleepEnable(), SysCtlPeripheralSleepDisable(), SysCtlPeripheralDeepSleepEnable(), and SysCtlPeripheralDeepSleepDisable().

Returns

None.

void SysCtlPeripheralDeepSleepDisable

(

uint32_t

ui32Peripheral

)

Disables a peripheral in deep-sleep mode.

Parameters

ui32Peripheral

is the peripheral to disable in deep-sleep mode.

This function causes a peripheral to stop operating when the processor goes into deep-sleep mode. Disabling peripherals while in deep-sleep mode helps to lower the current draw of the device, and can keep peripherals that require a particular clock frequency from operating when the clock changes as a result of entering deep-sleep mode. If enabled (via SysCtlPeripheralEnable()), the peripheral automatically resumes operation when the processor leaves deep-sleep mode, maintaining its entire state from before deep-sleep mode was entered.

Deep-sleep mode clocking of peripherals must be enabled via SysCtlPeripheralClockGating(); if disabled, the peripheral deep-sleep mode configuration is maintained but has no effect when deep-sleep mode is entered.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Returns

None.

void SysCtlPeripheralDeepSleepEnable

(

uint32_t

ui32Peripheral

)

Enables a peripheral in deep-sleep mode.

Parameters

ui32Peripheral

is the peripheral to enable in deep-sleep mode.

This function allows a peripheral to continue operating when the processor goes into deep-sleep mode. Because the clocking configuration of the device may change, not all peripherals can safely continue operating while the processor is in deep-sleep mode. Those that must run at a particular frequency (such as a UART) do not work as expected if the clock changes. It is the responsibility of the caller to make sensible choices.

Deep-sleep mode clocking of peripherals must be enabled via SysCtlPeripheralClockGating(); if disabled, the peripheral deep-sleep mode configuration is maintained but has no effect when deep-sleep mode is entered.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Returns

None.

void SysCtlPeripheralDisable

(

uint32_t

ui32Peripheral

)

Disables a peripheral.

Parameters

ui32Peripheral

is the peripheral to disable.

This function disables a peripheral. Once disabled, they do not operate or respond to register reads/writes.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Returns

None.

void SysCtlPeripheralEnable

(

uint32_t

ui32Peripheral

)

Enables a peripheral.

Parameters

ui32Peripheral

is the peripheral to enable.

This function enables a peripheral. At power-up, all peripherals are disabled; they must be enabled in order to operate or respond to register reads/writes.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Note

It takes five clock cycles after the write to enable a peripheral before the the peripheral is actually enabled. During this time, attempts to access the peripheral result in a bus fault. Care should be taken to ensure that the peripheral is not accessed during this brief time period.

Returns

None.

void SysCtlPeripheralPowerOff

(

uint32_t

ui32Peripheral

)

Powers off a peripheral.

Parameters

ui32Peripheral

is the peripheral to be powered off.

This function allows the power to a peripheral to be turned off. The peripheral continues to receive power when its clock is enabled, but the power is removed when its clock is disabled.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Note

The ability to power off a peripheral varies based on the Tiva part in use. Please consult the data sheet for the part you are using to determine if this feature is available.

Returns

None.

void SysCtlPeripheralPowerOn

(

uint32_t

ui32Peripheral

)

Powers on a peripheral.

Parameters

ui32Peripheral

is the peripheral to be powered on.

This function turns on the power to a peripheral. The peripheral continues to receive power even when its clock is not enabled.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Note

The ability to power off a peripheral varies based on the Tiva part in use. Please consult the data sheet for the part you are using to determine if this feature is available.

Returns

None.

bool SysCtlPeripheralPresent

(

uint32_t

ui32Peripheral

)

Determines if a peripheral is present.

Parameters

ui32Peripheral

is the peripheral in question.

This function determines if a particular peripheral is present in the device. Each member of the Tiva family has a different peripheral set; this function determines which peripherals are present on this device.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5,

Returns

Returns true if the specified peripheral is present and false if it is not.

bool SysCtlPeripheralReady

(

uint32_t

ui32Peripheral

)

Determines if a peripheral is ready.

Parameters

ui32Peripheral

is the peripheral in question.

This function determines if a particular peripheral is ready to be accessed. The peripheral may be in a non-ready state if it is not enabled, is being held in reset, or is in the process of becoming ready after being enabled or taken out of reset.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Note

The ability to check for a peripheral being ready varies based on the Tiva part in use. Please consult the data sheet for the part you are using to determine if this feature is available.

Returns

Returns true if the specified peripheral is ready and false if it is not.

void SysCtlPeripheralReset

(

uint32_t

ui32Peripheral

)

Performs a software reset of a peripheral.

Parameters

ui32Peripheral

is the peripheral to reset.

This function performs a software reset of the specified peripheral. An individual peripheral reset signal is asserted for a brief period and then de-asserted, returning the internal state of the peripheral to its reset condition.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Returns

None.

void SysCtlPeripheralSleepDisable

(

uint32_t

ui32Peripheral

)

Disables a peripheral in sleep mode.

Parameters

ui32Peripheral

is the peripheral to disable in sleep mode.

This function causes a peripheral to stop operating when the processor goes into sleep mode. Disabling peripherals while in sleep mode helps to lower the current draw of the device. If enabled (via SysCtlPeripheralEnable()), the peripheral automatically resumes operation when the processor leaves sleep mode, maintaining its entire state from before sleep mode was entered.

Sleep mode clocking of peripherals must be enabled via SysCtlPeripheralClockGating(); if disabled, the peripheral sleep mode configuration is maintained but has no effect when sleep mode is entered.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Returns

None.

void SysCtlPeripheralSleepEnable

(

uint32_t

ui32Peripheral

)

Enables a peripheral in sleep mode.

Parameters

ui32Peripheral

is the peripheral to enable in sleep mode.

This function allows a peripheral to continue operating when the processor goes into sleep mode. Because the clocking configuration of the device does not change, any peripheral can safely continue operating while the processor is in sleep mode and can therefore wake the processor from sleep mode.

Sleep mode clocking of peripherals must be enabled via SysCtlPeripheralClockGating(); if disabled, the peripheral sleep mode configuration is maintained but has no effect when sleep mode is entered.

The ui32Peripheral parameter must be only one of the following values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1, SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2, SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2, SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_FAN0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB, SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE, SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_GPIOG, SYSCTL_PERIPH_GPIOH, SYSCTL_PERIPH_GPIOJ, SYSCTL_PERIPH_GPIOK, SYSCTL_PERIPH_GPIOL, SYSCTL_PERIPH_GPIOM, SYSCTL_PERIPH_GPION, SYSCTL_PERIPH_GPIOP, SYSCTL_PERIPH_GPIOQ, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0, SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3, SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_LPC0, SYSCTL_PERIPH_PECI0, SYSCTL_PERIPH_PWM0, SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1, SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2, SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1, SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4, SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1, SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4, SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7, SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0, SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1, SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3, SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.

Returns

None.

uint32_t SysCtlPIOSCCalibrate

(

uint32_t

ui32Type

)

Calibrates the precision internal oscillator.

Parameters

ui32Type

is the type of calibration to perform.

This function performs a calibration of the PIOSC. There are three types of calibration available; the desired calibration type as specified in ui32Type is one of:

• SYSCTL_PIOSC_CAL_AUTO to perform automatic calibration using the 32-kHz clock from the hibernate module as a reference. This type is only possible on parts that have a hibernate module, and then only if it is enabled and the hibernate module's RTC is also enabled.
• SYSCTL_PIOSC_CAL_FACT to reset the PIOSC calibration to the factory provided calibration.
• SYSCTL_PIOSC_CAL_USER to set the PIOSC calibration to a user-supplied value. The value to be used is ORed into the lower 7-bits of this value, with 0x40 being the ``nominal'' value (in other words, if everything were perfect, 0x40 provides exactly 16 MHz). Values larger than 0x40 slow down PIOSC, and values smaller than 0x40 speed up PIOSC.

Returns

Returns 1 if the calibration was successful and 0 if it failed.

uint32_t SysCtlPWMClockGet

(

void

)

Gets the current PWM clock configuration.

This function returns the current PWM clock configuration.

Returns

Returns the current PWM clock configuration; is one of SYSCTL_PWMDIV_1, SYSCTL_PWMDIV_2, SYSCTL_PWMDIV_4, SYSCTL_PWMDIV_8, SYSCTL_PWMDIV_16, SYSCTL_PWMDIV_32, or SYSCTL_PWMDIV_64.

void SysCtlPWMClockSet

(

uint32_t

ui32Config

)

Sets the PWM clock configuration.

Parameters

ui32Config

is the configuration for the PWM clock; it must be one of SYSCTL_PWMDIV_1, SYSCTL_PWMDIV_2, SYSCTL_PWMDIV_4, SYSCTL_PWMDIV_8, SYSCTL_PWMDIV_16, SYSCTL_PWMDIV_32, or SYSCTL_PWMDIV_64.

This function configures the rate of the clock provided to the PWM module as a ratio of the processor clock. This clock is used by the PWM module to generate PWM signals; its rate forms the basis for all PWM signals.

Note

The clocking of the PWM is dependent upon the system clock rate as configured by SysCtlClockSet().

Returns

None.

void SysCtlReset

(

void

)

Resets the device.

This function performs a software reset of the entire device. The processor and all peripherals are reset and all device registers are returned to their default values (with the exception of the reset cause register, which maintains its current value but has the software reset bit set as well).

Returns

This function does not return.

void SysCtlResetCauseClear

(

uint32_t

ui32Causes

)

Clears reset reasons.

Parameters

ui32Causes

are the reset causes to be cleared; must be a logical OR of SYSCTL_CAUSE_LDO, SYSCTL_CAUSE_SW, SYSCTL_CAUSE_WDOG, SYSCTL_CAUSE_BOR, SYSCTL_CAUSE_POR, and/or SYSCTL_CAUSE_EXT.

This function clears the specified sticky reset reasons. Once cleared, another reset for the same reason can be detected, and a reset for a different reason can be distinguished (instead of having two reset causes set). If the reset reason is used by an application, all reset causes should be cleared after they are retrieved with SysCtlResetCauseGet().

Returns

None.

uint32_t SysCtlResetCauseGet

(

void

)

Gets the reason for a reset.

This function returns the reason(s) for a reset. Because the reset reasons are sticky until either cleared by software or a power-on reset, multiple reset reasons may be returned if multiple resets have occurred. The reset reason is a logical OR of SYSCTL_CAUSE_LDO, SYSCTL_CAUSE_SW, SYSCTL_CAUSE_WDOG, SYSCTL_CAUSE_BOR, SYSCTL_CAUSE_POR, and/or SYSCTL_CAUSE_EXT.

Returns

Returns the reason(s) for a reset.

void SysCtlSleep

(

void

)

Puts the processor into sleep mode.

This function places the processor into sleep mode; it does not return until the processor returns to run mode. The peripherals that are enabled via SysCtlPeripheralSleepEnable() continue to operate and can wake up the processor (if automatic clock gating is enabled with SysCtlPeripheralClockGating(), otherwise all peripherals continue to operate).

Returns

None.

uint32_t SysCtlSRAMSizeGet

(

void

)

Gets the size of the SRAM.

This function determines the size of the SRAM on the Tiva device.

Returns

The total number of bytes of SRAM.

void SysCtlUSBPLLDisable

(

void

)

Powers down the USB PLL.

This function disables the USB controller's PLL, which is used by its physical layer. The USB registers are still accessible, but the physical layer no longer functions.

Returns

None.

void SysCtlUSBPLLEnable

(

void

)

Powers up the USB PLL.

This function enables the USB controller's PLL, which is used by its physical layer. This call is necessary before connecting to any external devices.

Returns

None.